The MU0 Processor is a simple 16-bit processor design with a 12-bit address space.
Instruction format
All instructions are 12 bits and are formatted as such:
| 0 0 0 0 | 0 0 0 0 0 0 0 0 0 0 0 0 |
|---|---|
| opcode | operand (address) |
F | S |
Data flow
There are 2 data 16-bit data buses between the processor and memory - one in each direction. There is a single 12-bit address bus.
The value at the address on the address bus is loaded onto the data bus when the Rd signal goes high.
Similarly, the value on the data bus is written to the address on the address bus when the Wr signal goes high.
Registers
There are only 3 registers in this design:
- Accumulator (
ACC) - Instruction Register (
IR) - Program Counter (
PC)
Instructions
The MU0 processor has a simple instruction set:
| opcode | mnemonic | action |
|---|---|---|
| 0000 | LDA S | ACC = [S] |
| 0001 | STA S | [S] = ACC |
| 0010 | ADD S | ACC = ACC + [S] |
| 0011 | SUB S | ACC = ACC - [S] |
| 0100 | JMP S | PC = S |
| 0101 | JGE S | if ACC > 0 then PC = S |
| 0110 | JNE S | if ACC != 0 then PC = S |
| 0111 | STP | stop execution. |
This simple instruction set is very limiting and it can be difficult to write complex programs. Some techniques to achieve more complex behaviour include Runtime Instruction Modification.