Sometimes, it may be beneficial to allow a peripheral direct access to a block of memory, without having to go through the processor. This allows much faster data transfer without interrupting the processor, but prevents the processor from accessing the memory. A DMA controller is required to facilitate this.
DMA Sequence
A basic description of the DMA sequence could be as follows:
- Peripheral requests DMA transfer.
- DMA controller requests DMA from CPU.
- CPU grants DMA when ready.
- Bus switch 1 (CPU) disabled.
- Bus switches 2 & 3 (DMA controller and peripheral) enabled.
- DMA controller grants DMA transfer.